Logic Subscription

Process & Advanced Packaging

Understand all aspects of advanced logic technologies, gain visibility into the competition’s historical – and anticipated – approach, and make better next-node technology choices.

• Dimensional and Materials Analysis
  • 7-8 logic reports/year
  • 4-5 advanced packaging reports/year
• Trend Analysis – 3 briefings / year on technical trends by technology element
• Annual seminar

Process Flows

Requires a subscription to Process & Advanced Packaging
Enhance your Advanced Process & Packaging subscription with Process Flow Analysis (PFA), Process Flow Full Emulation (PFF), and more.

• Process Flow Analysis (PFA) – Process Steps, Tool Type, Material – 7 Logic reports / year
• Process Flow Full Emulation (PFF) – 3D Emulation, Layout GDS – 4 Logic reports /year

Transistor Characterization

See the complete picture of process technology and DC performance. Understand the process, see the performance, spot the trends.

• Universal curves for IOFF vs. ION and IOFF vs. ID, LIN; Transfer and output characteristics for each universal curve data point
• Annual seminar
• Comparative analysis briefing

SoC Design Analysis

Focused on high volume first-to-market SoCs on leading fabless / foundry combinations, this subscription provides standard cell analysis and layout analysis on multiple areas of leading-edge SoCs.

• Standard cells extracted, routing efficiency assessed, accurate gate density metrics calculated
• Large area layout image sets delivered in CircuitVision, upper level metal usage surveyed
• Trend Analysis – 3 briefings / year on leading-edge SoC segments
• Annual seminar

Digital Floorplan Analysis

A high-level view of SoC design quality, focusing on leading-edge APU, CPU, GPU, AI accelerator, FPGA, baseband / connectivity, VPU, advanced MCU components, plus emerging applications such as AR and vision processing SoCs.

• Digital Functional Analysis Report (DFAR) – executive summaries supported by image sets – 18 to 20 / year

Analytics - Digital Floorplan (DFR)

Requires a subscription to Digital Floorplan Analysis
Provides tools with which to query TechInsights’ data, conduct independent analysis, perform comparisons, and create visualizations of Digital Floorplan (DFR) and other data within the Logic Vertical. DFR data is aggregated from reports within the channel to enable customers to create their own analysis and curation.

Standard Cell GDS Library Analysis

GDS layout extraction of key standard cells used in multiple areas of the leading-edge SoCs , focused on high volume first-to-market SoCs on leading fabless/foundry combinations . 16-20 standard cells extracted, schematics and GDS layout showing local routing . Image sets delivered as pdf report and GDSII files for each cell.

• 标准电池GDS库报告- 8报告/你们ar
• Design technology interaction, layout
• Trade-offs between area and routing compromises
• Get rear-view knowledge on design library compromises to help support future design library choices
• Trend Analysis – 3 briefings / year on leading-edge SoC segments

Transistor Architecture Comparison

10 reports, ~5 reports refreshed annually, studying the last 3 technology generations by company and across companies: TSMC, Samsung, Intel.

• Channel Architecture
• Gate Architecture
• Source/Drain Engineering

Interconnect and Patterning Comparison

10 reports, ~5 reports refreshed annually, studying the last 3 technology generations by company and across companies: TSMC, Samsung, Intel.

• Contacts/Vias - MOL
• Patterning - MOL & BEOL
• Dielectrics & Metallization - BEOL